Advanced semiconductor and nanotechnology development

Developing ruthenium-based interconnects for next-generation semiconductor devices

ruthenium interconnects semiconductor scaling thermal conductivity chip design Moore’s Law

Scalable nanofabrication via directed self-assembly of block copolymers for next-gen electronics

nanofabrication block copolymers directed self-assembly semiconductor nanotechnology

Using gate-all-around nanosheet transistors for sub-3nm semiconductor scaling

nanosheet transistors semiconductor scaling advanced CMOS nanoelectronics transistor architecture

Preparing for 2032 processor nodes with novel semiconductor materials and architectures

semiconductor materials processor nodes Moore's Law advanced architectures 2032 technology

Optimizing back-end-of-line thermal management through nanoscale phase-change materials

thermal management phase-change materials nanoscale integrated circuits heat dissipation

Enhancing semiconductor performance via self-assembled monolayer doping for nanoscale devices

semiconductor doping nanoscale fabrication monolayer assembly surface chemistry electronic devices

3D monolithic integration of photonic chips for ultra-low-power optical computing

photonic computing 3D integration optical neural networks silicon photonics energy-efficient AI

Through EUV mask defect mitigation in sub-3nm semiconductor fabrication

semiconductor manufacturing EUV lithography mask defects nanofabrication chip scaling

Uniting glacier physics with semiconductor design for cryogenic computing

glacier physics cryogenic computing semiconductor design heat dissipation interdisciplinary engineering

Back-end-of-line thermal management solutions for 3nm semiconductor nodes and beyond

thermal management semiconductor 3nm node heat dissipation BEOL

Mitigating EUV mask defects for next-generation semiconductor lithography at picometer precision

EUV lithography mask defects semiconductor manufacturing picometer precision nanofabrication

Preparing for 2032 processor nodes with 3D-stacked photonic interconnects

photonic interconnects processor nodes 3D integration semiconductor technology high-performance computing