In resistive random-access memory (RRAM) and other emerging non-volatile memory technologies, crossbar arrays offer high-density integration and scalability. However, a critical challenge arises from sneak path currents—unwanted leakage currents that flow through neighboring memory cells when accessing a target cell. These currents degrade read/write accuracy and increase power consumption. Selector devices address this challenge by providing nonlinear current-voltage (I-V) characteristics, ensuring that only the targeted memory cell is activated while suppressing leakage through unselected cells. Two prominent types of selector devices are mixed ionic-electronic conductors (MIECs) and ovonic threshold switches (OTS). Their role is pivotal in enabling reliable operation of crossbar arrays.

The primary function of a selector device is to exhibit highly nonlinear I-V behavior, meaning the device remains in a high-resistance state (HRS) at low voltages but rapidly switches to a low-resistance state (LRS) when a threshold voltage is exceeded. This nonlinearity ensures that only the memory cell subjected to the full voltage bias is activated, while others in the array remain off. For instance, an ideal selector should have minimal current flow below the threshold voltage (e.g., sub-nanoampere leakage) and a sharp transition to high current (e.g., microampere to milliampere range) above the threshold. The steepness of this transition is quantified by the nonlinearity factor, defined as the ratio of the current at the threshold voltage to the current at half the threshold voltage. High-performance selectors achieve nonlinearity factors exceeding 10^6.

MIECs, such as Cu-doped GeSe or Ag-doped chalcogenides, operate based on ion migration. At low voltages, the ionic species are immobile, and the electronic conductivity is low. When the applied voltage exceeds a critical value, ions migrate to form conductive filaments, drastically increasing electronic conduction. The I-V curve of MIECs shows a threshold switching behavior with negligible leakage in the HRS. The ionic motion is reversible, allowing the selector to reset to HRS upon voltage removal. A key advantage of MIECs is their compatibility with resistive memory materials like oxide-based RRAM, as both rely on filamentary mechanisms. However, MIECs face challenges related to ion diffusion variability and long-term stability under repeated cycling.

OTS materials, typically chalcogenide alloys like GeTe or GeSe, exhibit electronic threshold switching without phase change. In the HRS, the material is amorphous and highly resistive. At the threshold voltage, an electric field-induced transition occurs, leading to a conductive state. Unlike phase-change memory, OTS devices do not require thermal energy for switching, enabling faster operation. The nonlinearity arises from the strong dependence of carrier mobility on the electric field. OTS selectors offer excellent endurance (>10^10 cycles) and fast switching speeds (<10 ns), making them suitable for high-performance memory arrays. Their amorphous nature also ensures uniform switching characteristics across large arrays.

Leakage suppression is another critical role of selector devices. In a crossbar array without selectors, sneak paths create parallel conduction routes, leading to erroneous readings and excessive power dissipation. The selector's high resistance in the off-state minimizes these unwanted currents. For example, a selector with an off-state resistance of 1 GΩ reduces the sneak current through an unselected cell to negligible levels, even if the memory element itself has a low resistance. This suppression is particularly important in large arrays where the cumulative effect of leakage can dominate the total power consumption.

Compatibility with memory elements is essential for seamless integration. The selector must match the electrical and thermal requirements of the memory device. For instance, the threshold voltage of the selector should align with the operating voltage of the memory cell to ensure synchronized switching. Thermal compatibility is also crucial—excessive heat generated during operation should not degrade either the selector or the memory element. MIECs and OTS materials are often paired with oxide-based RRAM or phase-change memory due to their complementary switching mechanisms and thermal budgets.

Material selection and device engineering play a significant role in optimizing selector performance. For MIECs, the choice of dopant (e.g., Cu, Ag) and host matrix (e.g., GeSe, SiO2) influences ion mobility and filament stability. In OTS devices, alloy composition (e.g., Ge-Se-Te systems) determines the threshold voltage and nonlinearity. Device scaling is another consideration—selectors must maintain performance at nanometer dimensions to keep pace with memory cell scaling. Studies have shown that both MIEC and OTS selectors can function reliably at sub-20 nm dimensions, though interfacial effects become more pronounced at smaller scales.

Reliability challenges include threshold voltage drift, cycling endurance, and variability. Threshold voltage drift refers to the gradual shift in switching voltage over time, which can affect array operation. Endurance is critical for applications requiring frequent writes, such as in-memory computing. Variability arises from stochastic ion motion in MIECs or local compositional fluctuations in OTS materials. Mitigation strategies involve material optimization (e.g., doping control), interface engineering (e.g., barrier layers), and operational schemes (e.g., pulse shaping).

In summary, selector devices like MIECs and OTS are indispensable for crossbar memory arrays, providing nonlinear I-V characteristics to suppress leakage and enable selective access. Their material properties and switching mechanisms must be carefully tailored to match the memory elements, ensuring reliable operation at scaled dimensions. While challenges remain in stability and variability, ongoing research continues to advance selector technology, paving the way for next-generation memory architectures.