The formation of a Schottky barrier at the interface between a metal and a semiconductor is a fundamental phenomenon in solid-state physics with significant implications for electronic and optoelectronic devices. The barrier arises due to the difference in work functions between the metal and the semiconductor, leading to charge redistribution and band bending at the interface. The height of this barrier critically influences device performance, particularly in Schottky diodes and field-effect transistors. Understanding and controlling the Schottky barrier height (SBH) requires a detailed analysis of work function mismatch, Fermi-level pinning, and interface states, along with engineering strategies to modulate these parameters.
When a metal contacts a semiconductor, the difference in their work functions determines the initial alignment of energy bands. The work function of a metal is the energy required to remove an electron from the Fermi level to vacuum, while the electron affinity of a semiconductor is the energy difference between the conduction band minimum and vacuum level. For an ideal Schottky contact, the barrier height for electrons is given by the difference between the metal work function and the semiconductor electron affinity for n-type materials, or the difference between the semiconductor valence band maximum and the metal work function for p-type materials. However, real interfaces often deviate from this ideal behavior due to Fermi-level pinning caused by interface states.
Fermi-level pinning occurs when a high density of electronic states at the interface traps charges, preventing the Fermi level from moving freely in response to the work function difference. These interface states can arise from defects, dangling bonds, or impurities introduced during fabrication. For example, on silicon surfaces, dangling bonds create mid-gap states that pin the Fermi level, making the SBH less sensitive to the metal work function. In compound semiconductors like GaAs, the pinning is even more pronounced due to intrinsic surface states. The degree of pinning is often quantified by the pinning factor S, which ranges from 0 (strong pinning) to 1 (no pinning). For Si, S is typically around 0.1-0.3, indicating significant pinning, whereas GaAs exhibits S values closer to 0.05.
Interface states also play a crucial role in determining the SBH. These states can be donor-like or acceptor-like, depending on their charge state relative to the Fermi level. Donor-like states are neutral when empty and positively charged when filled, while acceptor-like states are neutral when filled and negatively charged when empty. The charge distribution at the interface modifies the electrostatic potential, further influencing the SBH. For instance, in the Au/Si system, interface states contribute to a SBH of approximately 0.8 eV for n-type Si, regardless of the Au work function, due to strong Fermi-level pinning near the mid-gap.
To engineer the SBH for specific applications, several strategies have been developed. One approach is the introduction of interfacial layers between the metal and semiconductor. These layers can be ultrathin dielectrics, such as Al2O3 or HfO2, which reduce interface state density and modify the effective work function. For example, inserting a thin SiO2 layer between Ti and Si can lower the effective SBH by reducing Fermi-level pinning. Another strategy is doping the semiconductor near the interface to adjust the charge distribution. Selective doping can create a dipole layer that shifts the bands, effectively tuning the SBH. In GaN-based devices, heavily doped n+ regions beneath the contact reduce the SBH by narrowing the depletion width, enabling ohmic behavior.
Alloying the contact metal is another effective method to modulate the SBH. By combining metals with different work functions, the effective work function of the contact can be tailored. For instance, TiN is commonly used as a gate metal in GaN transistors due to its tunable work function (4.2-5.1 eV) depending on stoichiometry and processing conditions. Alloying Pt with Ni on Si can also produce intermediate SBH values between those of pure Pt (high SBH) and pure Ni (lower SBH). Additionally, annealing treatments can induce interfacial reactions that alter the SBH. For example, annealing Ni contacts on Si forms nickel silicide, which can reduce the SBH compared to pure Ni.
Characterization of Schottky barriers is primarily performed using current-voltage (I-V) and capacitance-voltage (C-V) measurements. I-V analysis provides the SBH and ideality factor, which indicates how closely the diode follows thermionic emission theory. A higher ideality factor suggests additional current mechanisms, such as recombination or tunneling. C-V measurements yield the built-in potential and doping concentration, from which the SBH can be extracted. For instance, in TiN/GaN contacts, I-V measurements reveal SBH values around 0.5-0.6 eV, while C-V gives slightly higher values due to the absence of tunneling effects. Photoelectron spectroscopy techniques, such as X-ray photoelectron spectroscopy (XPS), can directly measure the band alignment and interface chemistry, providing complementary information.
Common metal-semiconductor systems illustrate these principles. The Au/Si interface exhibits a SBH of ~0.8 eV for n-type Si, largely insensitive to Au’s work function due to strong pinning. In contrast, TiN/GaN contacts show more variability, with SBH ranging from 0.5 to 1.1 eV depending on TiN stoichiometry and GaN surface treatment. The higher SBH in GaN compared to Si is partly due to GaN’s wider bandgap and lower intrinsic interface state density. These examples highlight the interplay between material properties and interface engineering in determining Schottky barrier behavior.
In summary, Schottky barrier formation is governed by work function mismatch, Fermi-level pinning, and interface states. Engineering strategies such as interfacial layers, doping, and alloying provide precise control over the SBH, enabling optimized device performance. Characterization techniques like I-V and C-V measurements are essential for evaluating these interfaces. Advances in interface science continue to drive improvements in Schottky-based devices, from high-frequency transistors to energy-efficient diodes.