Radiation-hardened field-programmable gate arrays (FPGAs) are critical components in satellite and deep-space missions, where exposure to ionizing radiation can cause single-event upsets (SEUs), latch-up events, and total ionizing dose (TID) effects. These devices must maintain reliable operation despite high-energy particle strikes, making architectural hardening techniques essential. Two leading providers of rad-hard FPGAs, Xilinx and Microsemi (now part of Microchip Technology), employ distinct approaches to mitigate radiation effects while meeting the demands of aerospace applications.

The architecture of radiation-hardened FPGAs incorporates multiple layers of protection, including hardened silicon processes, redundancy schemes, and error correction. Triple modular redundancy (TMR) is a foundational technique used to ensure fault tolerance. In TMR, critical logic circuits are triplicated, and a voting system compares the outputs of the three redundant modules. If one module is corrupted by a radiation-induced error, the other two correct outputs override the faulty result. This method significantly reduces the probability of logic errors but comes with increased power consumption and area overhead. TMR is often applied selectively to mitigate these trade-offs, focusing on control logic, state machines, and memory elements where errors are most disruptive.

Configuration scrubbing is another key hardening mechanism, addressing the vulnerability of FPGA configuration memory to SEUs. Since FPGAs rely on static RAM (SRAM) to store their configuration, high-energy particles can flip bits, altering the device’s functionality. Scrubbing involves continuously reading back the configuration memory, detecting errors using error-correcting codes (ECC), and rewriting corrected data. Some FPGAs implement blind scrubbing, where the entire configuration is periodically refreshed without explicit error checking, while others use readback-and-compare methods for targeted corrections. Scrubbing frequency is carefully optimized to balance error recovery latency and power consumption.

Xilinx’s radiation-hardened FPGAs, such as the Virtex-5QV and the newer UltraScale+ series, leverage a combination of hardening-by-design and hardening-by-process. The Virtex-5QV employs a 65 nm silicon-on-insulator (SOI) process, which reduces single-event latch-up susceptibility by isolating transistors within insulating layers. These devices feature built-in TMR support for configuration memory, block RAM, and flip-flops, along with SEU-resistant routing. Xilinx’s approach emphasizes flexibility, allowing designers to implement partial TMR and selective scrubbing to optimize resource usage. The UltraScale+ rad-hard variants extend these capabilities with finer-grained redundancy and enhanced SEU recovery mechanisms, making them suitable for high-performance processing in geostationary and deep-space orbits.

Microsemi’s rad-hard FPGAs, including the RTG4 and RT PolarFire families, use a flash-based configuration memory architecture, which is inherently immune to SEUs in the configuration layer. This eliminates the need for configuration scrubbing, reducing power and complexity. The RTG4, fabricated on a 65 nm flash process, integrates TMR at the design level, requiring manual implementation by the user for logic hardening. Microsemi devices also incorporate analog mitigation techniques, such as SEU-hardened phase-locked loops (PLLs) and analog-to-digital converters (ADCs), which are critical for signal processing in radiation environments. The RT PolarFire series further reduces power consumption through a non-volatile, low-power architecture, making it advantageous for power-constrained missions.

A comparison of Xilinx and Microsemi rad-hard FPGAs reveals distinct advantages depending on mission requirements. Xilinx devices excel in reconfigurability and high-speed processing, with SRAM-based architectures supporting dynamic partial reconfiguration. This is beneficial for missions requiring adaptive algorithms or in-flight updates. However, the need for continuous scrubbing increases power consumption, which may be a drawback for long-duration deep-space missions. Microsemi’s flash-based FPGAs offer lower static power and instant-on capability, as the configuration is retained without external intervention. Their immunity to configuration SEUs simplifies system design but limits reconfigurability compared to SRAM-based alternatives.

For satellite applications in low Earth orbit (LEO), where radiation levels are moderate but exposure is prolonged, both Xilinx and Microsemi FPGAs are viable choices. Xilinx’s scrubbing mechanisms effectively manage SEU rates, while Microsemi’s flash-based approach ensures uninterrupted operation. In harsher environments, such as Jupiter missions where heavy ion flux is extreme, Xilinx’s finer-grained TMR and advanced error correction may provide higher reliability for critical functions. Microsemi’s devices, with their inherent configuration stability, are often preferred for long-life missions where power efficiency and simplicity are paramount.

Performance metrics further differentiate these solutions. Xilinx FPGAs typically offer higher logic density and faster processing speeds, supporting complex algorithms for onboard data processing. Microsemi’s strengths lie in lower power profiles and deterministic latency, which are crucial for real-time control systems. Both vendors provide extensive radiation test data, with TID tolerance exceeding 100 krad(Si) and single-event latch-up (SEL) immunity beyond 75 MeV-cm²/mg for most devices.

In conclusion, the choice between Xilinx and Microsemi rad-hard FPGAs depends on mission-specific priorities. Xilinx provides reconfigurable, high-performance solutions with robust SEU mitigation, while Microsemi offers power-efficient, inherently stable alternatives. Advances in both architectures continue to push the boundaries of radiation tolerance, ensuring reliable operation in the most demanding space environments. Future developments may further integrate machine learning accelerators and adaptive hardening techniques, enhancing the capabilities of next-generation aerospace electronics.