Silicon wafer cleaning and surface preparation are critical steps in semiconductor manufacturing, directly impacting device performance and yield. Contaminants such as particles, organic residues, and metallic impurities can degrade electrical properties, while native oxides and surface roughness can interfere with subsequent processes like epitaxial growth or gate dielectric formation. Effective cleaning must address these challenges while maintaining atomic-level smoothness and surface hydrophilicity.

The RCA cleaning method, developed by Werner Kern at RCA Laboratories, remains a cornerstone of silicon wafer cleaning. It consists of two primary solutions: SC-1 and SC-2. SC-1, a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2), and deionized water (typically in a 1:1:5 ratio), is designed to remove organic contaminants and particles. The mechanism involves oxidation of organic residues by H2O2 and slight etching of the silicon surface by NH4OH, which undercuts and lifts off particles. SC-1 also passivates the surface with a hydrophilic oxide layer, crucial for preventing recontamination. However, excessive exposure to SC-1 can lead to surface roughening due to non-uniform etching, necessitating precise control of time and temperature, often kept below 80°C.

SC-2, a mixture of hydrochloric acid (HCl), hydrogen peroxide (H2O2), and deionized water (typically 1:1:6), targets metallic impurities. HCl forms soluble metal chlorides, while H2O2 prevents redeposition by maintaining an oxidizing environment. SC-2 is particularly effective against alkali and transition metals but is less aggressive toward the silicon substrate, minimizing surface damage. The combination of SC-1 and SC-2 provides comprehensive contamination removal, though modern variations may adjust concentrations or sequence to address specific contamination profiles.

Megasonic cleaning enhances particle removal by employing high-frequency acoustic waves (typically 0.8–1 MHz) in a liquid medium. Unlike ultrasonic cleaning, which uses lower frequencies and can cause surface damage, megasonic energy generates smaller cavitation bubbles that dislodge submicron particles without substrate erosion. The physical force is particularly effective for removing particles trapped in surface features or adhering via van der Waals forces. Megasonic systems are often integrated into SC-1 baths to improve particle removal efficiency, especially for wafers with high aspect ratio structures.

Dry cleaning methods, such as UV-ozone treatment, offer an alternative to wet chemistry for organic contamination removal. UV light (wavelengths below 250 nm) dissociates oxygen molecules, generating ozone (O3) and atomic oxygen, which oxidize organic compounds into volatile byproducts like CO2 and H2O. The process is highly effective for light organic films and requires no liquid handling, reducing chemical waste. However, UV-ozone does not remove particles or metallic impurities and may grow a thin native oxide, necessitating complementary wet or plasma steps for full surface preparation.

Native oxide management is a key consideration in wafer cleaning. A chemical oxide grown during SC-1 or UV-ozone treatment can serve as a protective layer but must be removed before processes like epitaxy or silicide formation. Dilute hydrofluoric acid (DHF) is commonly used for oxide stripping, with concentrations ranging from 0.5% to 5% to balance etch rate and surface roughness. DHF leaves the surface hydrogen-terminated, which is hydrophobic and temporarily stable against reoxidation in cleanroom air. However, prolonged exposure to ambient conditions leads to gradual oxide regrowth, requiring timed processing or controlled environments for oxide-sensitive applications.

Surface hydrophilicity is essential for uniform wetting during spin-rinsing or coating processes. A hydrophilic surface, typically achieved through SC-1 or ozone treatment, ensures even liquid distribution and minimizes defects like watermarks. Atomic-level smoothness, often measured by atomic force microscopy (AFM) with root-mean-square (RMS) roughness below 0.2 nm, is critical for high-k dielectric deposition or nanoscale patterning. Overly aggressive cleaning can increase roughness, while insufficient cleaning leaves residual particles or organics that disrupt subsequent layers.

Advanced cleaning techniques continue to evolve, particularly for emerging technologies like 3D ICs and nanosheet transistors. Challenges include cleaning high-aspect-ratio trenches without stiction or pattern collapse, as well as minimizing defect introduction during novel material integration. The interplay between chemical, physical, and dry methods will remain central to achieving pristine surfaces in next-generation semiconductor manufacturing.